1. Technical Field
The present invention relates to a method and system for data processing, in general, and in particular, to a method and system for processing bus information within a computer system. Still more particularly, the present invention relates to a method and system for dynamically translating bus addresses within a computer system.
2. Description of the Prior Art
A computer system or data-processing system typically includes several types of buses, such as system bus, local buses, and peripheral buses. Various electronic-circuit devices and components are interconnected with each other via these buses such that intercommunication may be possible among all of the devices that are attached to one of the buses mentioned above. In general, a central processing unit (CPU) is attached to a system bus and over which the CPU communicates directly with a system memory that is also attached to the system bus.
A local bus such as Peripheral Component Interconnect (PCI) bus, is intended for connecting certain highly integrated peripheral components on the same bus as the CPU. Under the PCI local bus standard, peripheral components can directly connect to a PCI local bus without the need for glue logic. Thus, the PCI provides a bus standard on which high-performance peripheral devices, such as graphics devices and hard disk drives, can be coupled to the CPU, thereby permitting these high-performance peripheral devices to avoid the general access latency and the bandwidth constraints that would have occurred if these peripheral devices were connected to a peripheral bus.
A peripheral bus such as an Industry Standard Architecture (ISA) bus or an Extended Industry Standard Architecture (EISA) bus, is utilized for connecting various peripheral devices to the computer system. These peripheral devices typically include input/output (I/O) devices such as keyboard, floppy drives, and display monitor. A bus-to-bus bridge chip is commonly provided between a peripheral bus and a local bus in order to provide communication between devices that are attached to these two buses. A computer system can have other types of peripheral buses instead of, or in addition to, the two types of buses mentioned above. These include VM bus, XME bus, etc. Numerous types of peripheral devices are also available for usage with these various bus architectures.
In general, each bus in a computer system owns system resources such as I/O address space or memory address space that can be mapped into its parent bus address space. For example, in the PowerPC.TM. (PowerPC is a trademark of International Business Machines Corporation) platform, an ISA bus has an address range of 0-64 K that can be mapped to anywhere within a PCI local bus (ISA bus' parent bus) having an address range of 0-1 G. In turn, the address range 0-1 G of the PCI local bus can be mapped to anywhere within a system bus (PCI bus' parent bus) having an address range 0-2 G. Furthermore, the address range 0-2 G of the system bus can also be translated to a system physical address range of 1-3 G. Hence, a mouse device, utilizing an I/O port address of, for example, 0.times.60.sub.hex, may be mapped and translated anywhere in the 1-3 G range of the system physical address.
Under prior art, the bus address arrangement of a computer system is determined during the system initiation and cannot be changed during runtime. Hence, although all the devices within the computer system may be free of conflict in the beginning, this statically configured computer system cannot anticipate and provide a resource conflict resolution between the mouse device as mentioned above and, for example, a hot-pluggable peripheral device which utilizes the same I/O port address as the mouse device (i.e., 0-60.sub.hex) that may be installed in the computer system during runtime. Consequently, it would be desirable to provide a method for dynamically translating bus address during runtime in order to furnish a conflict-free resource for each device within a computer system.